This invention relates to driver circuits which are particularly used as driver elements in a High Speed Data link to provide control of jitter in an output signal.
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Signal drivers for high speed data links are known, as illustrated by U.S. Pat. No. 5,939,929, granted Aug. 15, 1999 entitled xe2x80x9cLow jitter low power single ended driverxe2x80x9d which could be used for ethernet repeaters and which produced a symmetric and therefor low jitter output signal in response to an input signal. This circuit required a first and second constant current which were combined to produce an output signal which was symmetric to the input signal received by the terminal circuit. For gigahertz frequencies Sun Microsystems, Inc. engineers designed a low phase noise LC oscillator for microprocessor clock distribution as described in U.S. Pat. No. 6,016,082, granted Jan. 18, 1992, where a continously modifiable gigahertz frequency VCO circuit generated an output signal with a frequency that was dependent on the voltage on a control voltage input line. This output signal was provided to a level shifter output circuit which converts the current signal to a single-ended voltage that is supplied to the output driver which provides the output signal to a clock distribution network.
In spite of these recent efforts, a review of the patent literature shows a failure to recognize that there is jitter which is produced by pre-emphasis or pre-distortion on a driver, and pre-emphasis has become desirable, as illustrated by t he iniband standard being developed.
This invention relates to the method described for decreasing the amount of jitter present at the receiver input of high speed data links which uses a driver circuit for input from a high speed data link which comprises a logic circuit having a first section (1) which provides data latches, a second section (2) which provides a circuit which generates a pre-destorted output and for compensating for level dependent jitter having an OR function element and a NOR function element each of which is coupled to two inputs and to a variable delay element as an input which provides a bi-modal delay for pulse width pre-distortion, a third section (3) which provides a muxing circuit, and a forth section (4) for clock distribution in the driver circuit.
The preferred embodiment of the invention is a method of controlling jitter on the driver circuit which includes: storing in said first section (1) the data that is being sent and the last two bits history of the information being sent; and skewing the stored history by one half of the cycle of the bit time of said circuit; and then passing the data to the third section and serializing the data by passing the data through said muxing circuit; timing information for said skewing and serialization being provided by said fourth section; and after said skewing and serialization steps, the second section samples the information in the first section and adjusts the timing information of said forth section to compensate the serialization of the third section for jitter.
A fifth section (5) is used for providing a logic test for the driver circuit.
The driver circuit of the present invention allows for level pre-emphasis in a driver, and yet compensates for level deployed jitter proved by pre-emphasis or pre-distortion on a driver signal to reduce the amount of jitter present at the receiver input of high speed data links. In accordance with the invention, I will describe a method for xe2x80x9cpre-distortingxe2x80x9d the data in both amplitude and pulse width in order to reduce overall jitter. A multi-level method for properly ratioing pulse width amplitudes and pre-compensating for pulse width distortion is presented.
For completeness, while not developed at the request of the U.S. Government, this invention has been secretly demonstrated for use in a 2 gigabit per second links for the U.S. government. The U.S. Government is understood not to have any ownership interest in the invention.
These and other improvements are set forth in the following detailed description. For a better understanding of the invention with advantages and features, refer to the description and to the drawings.